This invention relates generally to logic circuits and, more particularly, to a logic transfer circuit including two switching devices controlled by a single phase clock.
In the solution of most complex logic problems the ability to carry out certain functions in a synchronous, step-by-step manner is an important, if not essential, requirement. This can be achieved by employing a three-phase interleaved clock pulse system having overlap between successive phases, or by a two phase clock pulse system without overlap but with some form of information storage between phases. The need for storage is exemplified by the two gate capacitances per bit in conventional dynamic MOS shift registers and by the two flip-flops in master-slave arrangements.